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SubjectRe: Re: HT (Hyper Threading) aware process scheduling doesn't work as it should

On Nov 3, 2011, Henrique de Moraes Holschuh wrote:

> > On Thu, 03 Nov 2011, Artem S. Tashkinov wrote:
> > So, now the question is whether VCPUs quite an illogical enumeration is good for
> > power users as I highly doubt that 0-4, 1-5, 2-6 and 3-7 order can be easily
> > remembered and grasped. Besides neither top, not htop are HT aware so just by
>
> Power users are directed to hwloc. There's a reason I pointed you to it.
> hwloc would have told you upfront your real memory/cache/core/thread
> topology, either in text mode, through graphics, or as XML:
>
> Here's hwloc's "lstopo" text output for my single-processor X5550:
>
> Machine (6029MB) + Socket #0 + L3 #0 (8192KB)
> L2 #0 (256KB) + L1 #0 (32KB) + Core #0
> PU #0 (phys=0)
> PU #1 (phys=4)
> L2 #1 (256KB) + L1 #1 (32KB) + Core #1
> PU #2 (phys=1)
> PU #3 (phys=5)
> L2 #2 (256KB) + L1 #2 (32KB) + Core #2
> PU #4 (phys=2)
> PU #5 (phys=6)
> L2 #3 (256KB) + L1 #3 (32KB) + Core #3
> PU #6 (phys=3)
> PU #7 (phys=7)

A very useful utility indeed, thank you! Still I wonder if for the sake of simplicity
it is possible to show and present virtual CPU pairs to the user in natural order,
(0,1 2,3 4,5 6,7) not how it's currently done (0,4 1,5 2,6 3,7). I cannot believe
it's difficult to change the userspace representation of virtual CPU pairs.




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