Messages in this thread | | | Date | Mon, 28 Nov 2011 15:48:35 -0600 | From | Scott Wood <> | Subject | Re: [PATCH 3/3] mtd/nand : workaround for Freescale FCM to support large-page Nand chip |
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On 11/23/2011 06:41 PM, b35362@freescale.com wrote: > From: Liu Shuo <b35362@freescale.com> > > Freescale FCM controller has a 2K size limitation of buffer RAM. In order > to support the Nand flash chip whose page size is larger than 2K bytes, > we read/write 2k data repeatedly by issuing FIR_OP_RB/FIR_OP_WB and save > them to a large buffer. > > Signed-off-by: Liu Shuo <b35362@freescale.com> > Signed-off-by: Li Yang <leoli@freescale.com> > --- > drivers/mtd/nand/fsl_elbc_nand.c | 211 +++++++++++++++++++++++++++++++++++--- > 1 files changed, 194 insertions(+), 17 deletions(-) > > diff --git a/drivers/mtd/nand/fsl_elbc_nand.c b/drivers/mtd/nand/fsl_elbc_nand.c > index d634c5f..c96e714 100644 > --- a/drivers/mtd/nand/fsl_elbc_nand.c > +++ b/drivers/mtd/nand/fsl_elbc_nand.c > @@ -55,7 +55,9 @@ struct fsl_elbc_mtd { > struct device *dev; > int bank; /* Chip select bank number */ > u8 __iomem *vbase; /* Chip select base virtual address */ > - int page_size; /* NAND page size (0=512, 1=2048) */ > + int page_size; /* NAND page size, the mutiple of 2048. > + * (0=512, 1=2048, 2=4096, 4=8192....) > + */
Again, please remove this. It was sort-of reasonable when it was a boolean that selected between slightly different programming models. It doesn't make sense as "mtd->writesize == 512 ? 0 : mtd->writesize / 512".
What is the plan for migrating bad block markers on first use?
-Scott
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