lkml.org 
[lkml]   [2011]   [Nov]   [2]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
Date
From
SubjectRe: [RFC][PATCH 0/3] Add support for non-CPU TLBs in MMU-Notifiers
On Wed, Nov 02, 2011 at 05:46:02AM -0400, Robin Holt wrote:
> On Fri, Oct 21, 2011 at 02:21:45PM +0200, Joerg Roedel wrote:
> > Hi,
> >
> > this is my first attempt to add support for non-CPU TLBs to the
> > MMU-Notifier framework. This will be used by the AMD IOMMU driver for
> > the next generation of hardware. The next version of the AMD IOMMU can
> > walk page-tables in AMD64 long-mode format (with setting
> > accessed/dirty-bits atomically) and save the translations in its own
> > TLB. Page faulting for IO devices is supported too. This will be used to
> > let hardware devices share page-tables with CPU processes and access
> > their memory directly. Please look at
> >
> > http://support.amd.com/us/Processor_TechDocs/48882.pdf
>
> ...
>
> Did this patch set get any review or traction? Perhaps you should have
> included the linux-mm@kvack.org mailing list.

I have included this mailing list in my post afaics. I talked with
Andrea Arcangeli about these patches at LinuxCon in Prague and will post
a new version based on his comments.


Joerg

--
AMD Operating System Research Center

Advanced Micro Devices GmbH Einsteinring 24 85609 Dornach
General Managers: Alberto Bozzo, Andrew Bowd
Registration: Dornach, Landkr. Muenchen; Registerger. Muenchen, HRB Nr. 43632



\
 
 \ /
  Last update: 2011-11-02 11:01    [W:0.064 / U:9.724 seconds]
©2003-2018 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site