Messages in this thread | | | Subject | Re: [PATCH 2/3] mtd/nand : set Nand flash page address to FBAR and FPAR correctly | From | Artem Bityutskiy <> | Date | Fri, 18 Nov 2011 00:13:34 +0200 |
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On Tue, 2011-11-15 at 17:29 +0800, b35362@freescale.com wrote: > From: Liu Shuo <b35362@freescale.com> > > If we use the Nand flash chip whose number of pages in a block is greater > than 64(for large page), we must treat the low bit of FBAR as being the > high bit of the page address due to the limitation of FCM, it simply uses > the low 6-bits (for large page) of the combined block/page address as the > FPAR component, rather than considering the actual block size.
Looks like this patch depends on the previous white-space clean-up patch - could you please refactor it (and 3/3 too) and resend?
Artem.
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