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    SubjectRe: [PATCH] gpio: langwell: ensure alternate function is cleared
    On Wed, Oct 5, 2011 at 1:52 AM, Adrian Hunter <adrian.hunter@intel.com> wrote:
    > On 04/10/11 21:37, Grant Likely wrote:
    >>
    >> On Mon, Oct 03, 2011 at 02:36:07PM +0300, Adrian Hunter wrote:
    >>> +       ptr = (void __iomem *)(lnw->reg_base + reg_type * nreg * 4 + reg
    >>> * 4);
    >>
    >> This looks wrong.  It looks to me like the __iomem annotation should
    >> be added to ->reg_base.
    >>
    >> Otherwise, the patch looks okay.
    >>
    >
    > Deserves a separate patch...

    What order do they get applied in? </grant-being-lazy>

    >
    > From: Adrian Hunter <adrian.hunter@intel.com>
    > Date: Wed, 5 Oct 2011 10:29:27 +0300
    > Subject: [PATCH] gpio: langwell: declare reg_base as __iomem
    >
    > reg_base is __iomem so add that to the declaration
    > and fix up assignment casts and types.
    >
    > Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
    > ---
    >  drivers/gpio/gpio-langwell.c |   12 ++++++------
    >  1 files changed, 6 insertions(+), 6 deletions(-)
    >
    > diff --git a/drivers/gpio/gpio-langwell.c b/drivers/gpio/gpio-langwell.c
    > index 00692e8..b7465e5 100644
    > --- a/drivers/gpio/gpio-langwell.c
    > +++ b/drivers/gpio/gpio-langwell.c
    > @@ -64,7 +64,7 @@ enum GPIO_REG {
    >
    >  struct lnw_gpio {
    >        struct gpio_chip                chip;
    > -       void                            *reg_base;
    > +       void __iomem                    *reg_base;
    >        spinlock_t                      lock;
    >        unsigned                        irq_base;
    >        struct pci_dev                  *pdev;
    > @@ -78,7 +78,7 @@ static void __iomem *gpio_reg(struct gpio_chip *chip,
    > unsigned offset,
    >        u8 reg = offset / 32;
    >        void __iomem *ptr;
    >
    > -       ptr = (void __iomem *)(lnw->reg_base + reg_type * nreg * 4 + reg *
    > 4);
    > +       ptr = lnw->reg_base + reg_type * nreg * 4 + reg * 4;
    >        return ptr;
    >  }
    >
    > @@ -90,7 +90,7 @@ static void __iomem *gpio_reg_2bit(struct gpio_chip *chip,
    > unsigned offset,
    >        u8 reg = offset / 16;
    >        void __iomem *ptr;
    >
    > -       ptr = (void __iomem *)(lnw->reg_base + reg_type * nreg * 4 + reg *
    > 4);
    > +       ptr = lnw->reg_base + reg_type * nreg * 4 + reg * 4;
    >        return ptr;
    >  }
    >
    > @@ -299,7 +299,7 @@ static const struct dev_pm_ops lnw_gpio_pm_ops = {
    >  static int __devinit lnw_gpio_probe(struct pci_dev *pdev,
    >                        const struct pci_device_id *id)
    >  {
    > -       void *base;
    > +       void __iomem *base;
    >        int i;
    >        resource_size_t start, len;
    >        struct lnw_gpio *lnw;
    > @@ -324,8 +324,8 @@ static int __devinit lnw_gpio_probe(struct pci_dev
    > *pdev,
    >                dev_err(&pdev->dev, "error mapping bar1\n");
    >                goto err3;
    >        }
    > -       irq_base = *(u32 *)base;
    > -       gpio_base = *((u32 *)base + 1);
    > +       irq_base = *(__force u32 *)base;
    > +       gpio_base = *((__force u32 *)base + 1);
    >        /* release the IO mapping, since we already get the info from bar1 */
    >        iounmap(base);
    >        /* get the register base from bar0 */
    > --
    > 1.7.6
    >
    >



    --
    Grant Likely, B.Sc., P.Eng.
    Secret Lab Technologies Ltd.
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