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SubjectRe: [V3][PATCH 0/7] perf, x86: Implement AMD IBS

* Peter Zijlstra <> wrote:

> On Fri, 2011-09-23 at 14:20 +0200, Robert Richter wrote:
> > > The only thing I'm not quite sure on is the userspace bits, but those
> > > are in the future work section as well, but possibly Ingo has a strong
> > > opinion here, sadly he doesn't have email atm :/
> >
> > With Lin's patch 'perf: Remove perf_event_attr::type check' we already
> > can sample with perf record.
> >
> > I think we could extend perf report to parse also ibs samples.
> > The only thing we need for it should be the pmu name/type mapping
> > in the header and the pmu type in the sample. See my
> > comment on Stephane's patch '[PATCH] perf: make more
> > self-descriptive (v5)'.
> OK, so Ingo really really wants to see a little more perf
> integration there. Acme, what's the state of Stephane's patch?

So the whole IBS thing looks quite unintegrated to me - and that's
partly because the hw is admittedly weird. The way we could perhaps
live with it upstream is two conditions:

- Testable IBS user-space code a bit more prominently integrated
than having to go down into a cellar with no working lights and
finding the code on display in tools/perf/Documentation/examples/
on the bottom of a locked filing cabinet stuck in a disused
lavatory with a sign on the door saying 'Beware of the Leopard.'

- Only root/privileged users should be able to access it. Right now
i think it's root-only due to percpu restrictions, but wanted to
mention it that this is an explicit requirement.

Non-privileged IBS use could be enabled by having working integration
with generic events: we could add a upos generic event for example so
IBS could map to '-e uops:p' or such, to allow skid-less profiling on



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