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SubjectRe: [PATCHv5] DMAEngine: Define interleaved transfer request api
On Fri, 2011-10-14 at 23:38 +0800, Barry Song wrote:
> Vinod, actually it is not decided by codec. it is only related with
> the hardware of pcm, i2s or AC'97 controllers in SoC. i did remember
> some people once licensed a TDM tranfer enginee from synopsys and IC
> guys bound one TDM slot, which has a seperate dma channel, to one
> audio channel then organize several TDM slots into a AC97 controller.
Not sure if I follow you.
For i2s and pcm you send left/right channel and then right/left channel.
Data is sent interleaved. DMA also treats it same way.
I don't know about AC97 so wont comment about it
> i am on holiday now and i can't give you more information until next
> week.
> Still i saw most other chips binding multi-channels of an I2S/PCM/AC97
> audio controller in a dma channel, then it doesn't need interleaved
> dma api as its dma address will increase continuously. dma will
> transfer left+right together but not one left and one right.
Right :)


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