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    SubjectRE: [PATCHv1 09/12] unicore32 core architecture: timer and time
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    On Mon, 2011-01-03 at 13:52 +0800, Guan Xuetao wrote: 
    > > When using clocksource_register_hz(&cksrc_puv3_oscr, CLOCK_TICK_RATE ),
    > > the shift value become 0, and mult value become 0x838a91a7, and the system will be broken
    > > after printing "Switching to clocksource oscr".
    > >
    > > When using clocksource_register_khz(&cksrc_puv3_oscr, CLOCK_TICK_RATE ),
    > > the shift value become 0, and mult value become 0x4359611, and the system will run smoothly,
    > > but timer interrupt seems too frequently. Perhaps it is 4 times faster.
    > >
    > > For comparison, originally, when shift value is set to 0x12, the mult value become 1175e5e.
    > >
    >
    > The error is the implementation of do_div() function.
    > When replacing the arch-specific div64.h with asm-generic/div64.h, clocksource_rigister_hz() works.

    Oh great! You had me worried I had a bug in the mult/shift calculation.

    Great to hear all is working now! If you run into other clock/time
    related troubles, please let me know.

    thanks
    -john





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