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    SubjectRe: [PATCH v2 02/11] msm: Generalize timer register mappings
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    On Mon, 2011-01-24 at 14:44 -0800, David Brown wrote:
    > On Mon, Jan 24 2011, Daniel Walker wrote:
    >
    > > On Wed, 2011-01-19 at 12:25 -0800, David Brown wrote:
    > >> + int global_offset = 0;
    > >> +
    > >> + if (cpu_is_msm7x01()) {
    > >> + msm_clocks[MSM_CLOCK_GPT].regbase = MSM_CSR_BASE;
    > >> + msm_clocks[MSM_CLOCK_DGT].regbase = MSM_CSR_BASE + 0x10;
    > >> + } else if (cpu_is_msm7x30()) {
    > >> + msm_clocks[MSM_CLOCK_GPT].regbase = MSM_CSR_BASE + 0x04;
    > >> + msm_clocks[MSM_CLOCK_DGT].regbase = MSM_CSR_BASE + 0x24;
    > >> + } else if (cpu_is_qsd8x50()) {
    > >> + msm_clocks[MSM_CLOCK_GPT].regbase = MSM_CSR_BASE;
    > >> + msm_clocks[MSM_CLOCK_DGT].regbase = MSM_CSR_BASE + 0x10;
    > >> + } else if (cpu_is_msm8x60()) {
    > >> + msm_clocks[MSM_CLOCK_GPT].regbase = MSM_TMR_BASE + 0x04;
    > >> + msm_clocks[MSM_CLOCK_DGT].regbase = MSM_TMR_BASE + 0x24;
    > >> +
    > >> + /* Use CPU0's timer as the global timer. */
    > >> + global_offset = MSM_TMR0_BASE - MSM_TMR_BASE;
    > >> + } else
    > >> + BUG();
    > >
    > > Ifdef's here would be OK I think, your already using the "runtime"
    > > checks ..
    >
    > The point of the change is to get rid of the ifdefs so that we can
    > dynamically detect which target we are on. Yes, there are other places
    > where it doesn't work, but we'll get there gradually.

    I'm not suggesting you do something you can't do right now ..

    For instance you could make,

    #define MSM_MSM7XXX_DGT_BASE (MSM_TMR_BASE + 0x10)

    and use that instead of what you have above.

    Daniel

    --

    Sent by a consultant of the Qualcomm Innovation Center, Inc.
    The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.



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