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    SubjectRe: [PATCH] x86, HPET: ignore any PCI BARs that match an HPET we already know about
    On Wednesday, September 22, 2010 04:10:36 pm H. Peter Anvin wrote:
    > On 09/22/2010 02:52 PM, Bjorn Helgaas wrote:
    > >
    > > We don't necessarily need to slavishly copy what Windows does, but
    > > I'd feel better if we understood how it avoided the problem on the
    > > Gigabyte board so we could make a more informed decision.
    > >
    > > It really doesn't look like Windows, and therefore BIOS writers,
    > > share your expectations about PCI BARs in E820 reserved areas.
    > > It's likely still *safe* to make them fixed resources, but we might
    > > be able to fix more issues if we knew how Windows avoids the problem.
    > >
    > Keep in mind that Windows -- the version they tested against -- might
    > just work by accident. That's a "ship it" condition for the BIOS for
    > almost every vendor.

    Yep. I really wish I had a board to play with to find out. I'm sure
    we'd learn something useful.

    > Also, do note that the reservations don't necessarily need to come from
    > the BIOS; we can mark the HPET area internally reserved, for example,
    > when we discover it.

    That actually raises another question I had: we currently look at the
    HPET table pretty early, but I don't know whether the earliness is a
    requirement. It would be cleaner if we could ignore the table and
    discover the HPET later in normal ways like pnp_register_driver() and
    pci_register_driver(). Then I could imagine someday dealing with the
    resources in a more generic way, i.e., in the PCI and PNP cores.


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