Messages in this thread | | | Date | Mon, 30 Aug 2010 14:55:56 +0200 | From | Sascha Hauer <> | Subject | Re: [PATCH 3/3 v2] dmaengine: Add Freescale i.MX SDMA support |
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On Sun, Aug 29, 2010 at 02:35:01PM +0200, Linus Walleij wrote: > 2010/8/28 Sascha Hauer <s.hauer@pengutronix.de>: > > > Peripherals integrated into a SoC like the SDMA engine here are > > normally accessible in native endianess and thus need the __raw_* > > functions. > > So the SDMA actually switch and twist around the endianness of > its registers if it's synthesized into a bigendian version of the system? > > Or hardware-dynamically even depending on the setting of the > endianness bit in the ARM core?
I think it's the bus between the ARM core and the periherals which changes the endianess. I have never tried running an i.MX in big endian mode, so I can only guess how the system really behaves in BE mode.
Sascha
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