Messages in this thread | | | Date | Thu, 26 Aug 2010 19:34:04 +0400 | From | Cyrill Gorcunov <> | Subject | Re: [PATCH -v3] perf, x86: try to handle unknown nmis with running perfctrs |
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On Thu, Aug 26, 2010 at 11:22:46AM -0400, Don Zickus wrote: > On Thu, Aug 26, 2010 at 01:18:29PM +0400, Cyrill Gorcunov wrote: > > On Thu, Aug 26, 2010 at 1:00 PM, Robert Richter <robert.richter@amd.com> wrote: > > ... > > > > > > This could also be a race in the counter handling code, or we do not > > > proper count the number of handled counters. Maybe 2 counters actually > > > fired but we only noticed one counter and then accidentially cleared > > > the 2nd without processing it. > > > > > > -Robert > > > > > > > Any chance to get it tested on P4 machine since it has a bit > > different design? > > Hmm, I take that back. I guess I can reproduce this on my i5 that I had > using Ingo's config. > > Working on Robert's assumption, I added code to perf_event_intel.c that > said if handled !=0 just add one to it (IOW always process handled as 0 or > something >1). That seems to working good and catches the nmis that Ingo > was seeing. > > I'll keep looking for the race condition to better fix it. > > Cheers, > Don >
Sounds promising, mind to post new inter-diff? Ie what you have changed from Robert's patch.
-- Cyrill
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