Messages in this thread | | | Date | Tue, 17 Aug 2010 09:12:37 +0200 | From | Micha Nelissen <> | Subject | Re: [PATCH 2/9] RapidIO, powerpc/85xx: modify RIO port-write interrupt handler |
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Bounine, Alexandre wrote: > capable to receive and keep only one PW message. Therefore, I copy it > into the driver's FIFO and re-enable HW Rx queue (it is called queue but > can accept only one entry) ASAP. I have a test setup that is capable > generate multiple PW messages and see many messages discarded by PW > controller because of this single-entry HW queue.
Primarily due to the single entry queue, the order of checking is probably insignificant? :-) Anyway, I don't mind changing the order.
Micha
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