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    Subject[050/140] drm/i915: enable low power render writes on GEN3 hardware.
    2.6.33-stable review patch.  If anyone has any objections, please let us know.

    ------------------

    From: Dave Airlie <airlied@redhat.com>

    commit 944001201ca0196bcdb088129e5866a9f379d08c upstream.

    A lot of 945GMs have had stability issues for a long time, this manifested as X hangs, blitter engine hangs, and lots of crashes.

    one such report is at:
    https://bugs.freedesktop.org/show_bug.cgi?id=20560

    along with numerous distro bugzillas.

    This only took a week of digging and hair ripping to figure out.

    Tracked down and tested on a 945GM Lenovo T60,
    previously running
    x11perf -copypixwin500
    or
    x11perf -copywinpix500
    repeatedly would cause the GPU to wedge within 4 or 5 tries, with random busy bits set.

    After this patch no hangs were observed.

    Signed-off-by: Dave Airlie <airlied@redhat.com>
    Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>

    ---
    drivers/gpu/drm/i915/i915_gem.c | 10 ++++++++++
    1 file changed, 10 insertions(+)

    --- a/drivers/gpu/drm/i915/i915_gem.c
    +++ b/drivers/gpu/drm/i915/i915_gem.c
    @@ -4999,6 +4999,16 @@ i915_gem_load(struct drm_device *dev)
    list_add(&dev_priv->mm.shrink_list, &shrink_list);
    spin_unlock(&shrink_list_lock);

    + /* On GEN3 we really need to make sure the ARB C3 LP bit is set */
    + if (IS_GEN3(dev)) {
    + u32 tmp = I915_READ(MI_ARB_STATE);
    + if (!(tmp & MI_ARB_C3_LP_WRITE_ENABLE)) {
    + /* arb state is a masked write, so set bit + bit in mask */
    + tmp = MI_ARB_C3_LP_WRITE_ENABLE | (MI_ARB_C3_LP_WRITE_ENABLE << MI_ARB_MASK_SHIFT);
    + I915_WRITE(MI_ARB_STATE, tmp);
    + }
    + }
    +
    /* Old X drivers will take 0-2 for front, back, depth buffers */
    dev_priv->fence_reg_start = 3;




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