lkml.org 
[lkml]   [2010]   [Jul]   [30]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    Patch in this message
    /
    Date
    From
    Subject[13/17] x86, Calgary: Limit the max PHB number to 256
    2.6.27-stable review patch.  If anyone has any objections, please let us know.

    ------------------

    From: Darrick J. Wong <djwong@us.ibm.com>

    commit d596043d71ff0d7b3d0bead19b1d68c55f003093 upstream.

    The x3950 family can have as many as 256 PCI buses in a single system, so
    change the limits to the maximum. Since there can only be 256 PCI buses in one
    domain, we no longer need the BUG_ON check.

    Signed-off-by: Darrick J. Wong <djwong@us.ibm.com>
    LKML-Reference: <20100701004519.GQ15515@tux1.beaverton.ibm.com>
    Signed-off-by: H. Peter Anvin <hpa@zytor.com>
    Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>

    ---
    arch/x86/kernel/pci-calgary_64.c | 4 +---
    1 file changed, 1 insertion(+), 3 deletions(-)

    --- a/arch/x86/kernel/pci-calgary_64.c
    +++ b/arch/x86/kernel/pci-calgary_64.c
    @@ -109,7 +109,7 @@ int use_calgary __read_mostly = 0;
    * x3950 (PCIE): 8 chassis, 32 PHBs per chassis = 256
    * x3950 (PCIX): 8 chassis, 16 PHBs per chassis = 128
    */
    -#define MAX_PHB_BUS_NUM 384
    +#define MAX_PHB_BUS_NUM 256

    #define PHBS_PER_CALGARY 4

    @@ -1097,8 +1097,6 @@ static int __init calgary_init_one(struc
    struct iommu_table *tbl;
    int ret;

    - BUG_ON(dev->bus->number >= MAX_PHB_BUS_NUM);
    -
    bbar = busno_to_bbar(dev->bus->number);
    ret = calgary_setup_tar(dev, bbar);
    if (ret)



    \
     
     \ /
      Last update: 2010-07-30 19:07    [W:0.019 / U:455.164 seconds]
    ©2003-2016 Jasper Spaans. hosted at Digital OceanAdvertise on this site