Messages in this thread Patch in this message | | | Date | Wed, 21 Jul 2010 17:31:27 -0400 (EDT) | From | Len Brown <> | Subject | [PATCH] ACPI: make acpi_idle Nehalem-aware |
| |
From: Len Brown <len.brown@intel.com>
The BIOS exports deep C-states on modern Intel processors as "C3-type" to satisfy various legacy Operating Systems.
However, the hardware actually supports C2-type, and does not require the extra costs of C3-type.
One of the costs is to check the BM_STS (Bus Master Status) bit before entering C3, and instead choose a shallower C-state if there was "recent bus master activity".
We have found a number of systems in the field that erroneously set BM_STS and prevent entry into deep C-states. Re-define BIOS presented C3-type states as C2-type states on modern processors to avoid this issue.
If a device in the system really does want to prevent use of a deep C-state, its Linux driver should register its constraints via pm_qos_add_request().
https://bugzilla.kernel.org/show_bug.cgi?id=15886
Signed-off-by: Len Brown <len.brown@intel.com> --- drivers/acpi/processor_idle.c | 38 ++++++++++++++++++++++++++++++++++++++ 1 files changed, 38 insertions(+), 0 deletions(-)
diff --git a/drivers/acpi/processor_idle.c b/drivers/acpi/processor_idle.c index b1b3856..14d1a0c 100644 --- a/drivers/acpi/processor_idle.c +++ b/drivers/acpi/processor_idle.c @@ -607,6 +607,38 @@ static void acpi_processor_power_verify_c3(struct acpi_processor *pr, return; } +/* + * Modern Intel processors support only ACPI C2-type C-states. + * But the BIOS tends to report its deepest C-state as C3-type + * to satisfy various old operating systems. We can skip + * C3 OS overhead by treating the deep-states as C2-type. + * Also, we can avoid checking BM_STS, which on some systems + * erroneously prevents entry into C3-type states. + */ +static int acpi_c3type_is_really_c2type(void) { + + if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) + return 0; + + if (boot_cpu_data.x86 != 6) + return 0; + + switch(boot_cpu_data.x86_model) { + case 0x1A: /* Core i7, Xeon 5500 series */ + case 0x1E: /* Core i7 and i5 Processor */ + case 0x1F: /* Core i7 and i5 Processor */ + case 0x2E: /* NHM-EX Xeon */ + case 0x2F: /* WSM-EX Xeon */ + case 0x25: /* WSM */ + case 0x2C: /* WSM */ + case 0x2A: /* SNB */ + case 0x2D: /* SNB Xeon */ + return 1; + default: + return 0; + } +} + static int acpi_processor_power_verify(struct acpi_processor *pr) { unsigned int i; @@ -617,6 +649,12 @@ static int acpi_processor_power_verify(struct acpi_processor *pr) for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) { struct acpi_processor_cx *cx = &pr->power.states[i]; + if ((cx->type == ACPI_STATE_C3) + && acpi_c3type_is_really_c2type()) { + ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Redefining C3-type to C2\n")); + cx->type = ACPI_STATE_C2; + } + switch (cx->type) { case ACPI_STATE_C1: cx->valid = 1; -- 1.7.2.rc3.43.g24e7a
| |