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    SubjectRe: [PATCH] x86: fix ordering constraints on crX read/writes
    On 07/15/2010 07:34 AM, Jeremy Fitzhardinge wrote:
    > On 07/14/2010 06:29 PM, H. Peter Anvin wrote:
    >> Yes, it will definitely NOT be pruned. I'm going to file a gcc documentation request to see if any of this is actually needed, though. There may also be a need for gcc to handle *inbound* general memory constraints.
    > You mean "depends on all prior memory updates"? We have been relying on
    > "memory" to do that (barrier(), for example), but it would be nice to
    > explicitly confirm that's OK, or get something which is guaranteed to be OK.

    No, we haven't. You're misunderstanding what a "memory" clobber does.
    A clobber affects the output side only, but doesn't inherently provide
    ordering on the input side. Apparently this is implicit in "asm
    volatile", which is a very important property.


    H. Peter Anvin, Intel Open Source Technology Center
    I work for Intel. I don't speak on their behalf.

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