Messages in this thread | | | Date | Sun, 09 May 2010 12:49:31 -0400 | From | Bill Davidsen <> | Subject | Re: Microblaze - The fist year |
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Michael Schnell wrote: > On 04/13/2010 03:27 PM, Michal Simek wrote: >> >> yes, futex is there. You can check it in >> arch/microblaze/include/asm/futex.h > Great ! I'll check how this is done. >> >>> Does Microblaze MMU Linux support SMP ? >> >> It is possible to connect several MicroBlazes but the problem is >> missing cache coherency modul. I hope that Xilinx will release any >> version which will support it. >> We haven't done any significant work to support it but it is expected >> solution which will happen. > > Besides cache coherency, another problem might be doing FUTEX. here (I > suppose) SMP safe atomic user space operations are necessary. many > simple RISK (load/store-) CPUs don't provide these (new ARMs provide > "load-locked / store-conditional" on that behalf as an extension to the > load/store paradigm. I suppose these can be done in an SMP-safe way, > supposedly using the hardware that provides cache coherency). > I wonder if you could make this work with some variant of NUMA configuration. I don't predict anything about being practical even if it works, just a thought.
-- Bill Davidsen <davidsen@tmr.com> "We have more to fear from the bungling of the incompetent than from the machinations of the wicked." - from Slashdot
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