Messages in this thread | | | Date | Thu, 6 May 2010 10:17:21 +0200 | From | Borislav Petkov <> | Subject | Re: [113/197] x86, cacheinfo: Calculate L3 indices |
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From: Jiri Kosina <jkosina@suse.cz> Date: Wed, May 05, 2010 at 05:33:45PM -0400
> Yeah, you are right, returning -1 is bogus as well. > > The point is though, that we really should be checking for return value of > node_to_k8_nb_misc() as it can legitimately return NULL, can't it? (and > other places, such as show_cache_disable() and store_cache_disable(), are > checking for this being NULL properly).
Well, I don't like sprinkling NULL ptr checks all over the place - this makes the code unreadable and means that there's something wrong with its design in the first place.
Therefore, it is better IMO to verify whether the K8_NB thing is initialized properly and exit early if not. And this is what the two patches I'm suggesting try to accomplish:
1. Call into K8_NB on AMD unconditionally so that we have those initialized (we'll be needing them more in the future, I guess)
2. Check in the L3 cache code whether K8_NB has initted properly and bail out if not.
With this, no need for NULL ptr checks anywhere and you got better/smaller/more readable code with the proper assumptions in place.
Thanks.
-- Regards/Gruss, Boris.
-- Advanced Micro Devices, Inc. Operating Systems Research Center
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