Messages in this thread | | | Date | Wed, 5 May 2010 20:02:28 +0200 | From | Borislav Petkov <> | Subject | Re: [113/197] x86, cacheinfo: Calculate L3 indices |
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From: Jiri Kosina <jkosina@suse.cz> Date: Wed, May 05, 2010 at 12:26:19PM -0400
> Please consider applying the patch below, both for 2.6.34 and all the > -stable kernels this patch has hit. > > > > From: Jiri Kosina <jkosina@suse.cz> > Subject: [PATCH] x86, cacheinfo: fix oops in amd_calc_l3_indices() > > Commit 048a8774ca4348 ("x86, cacheinfo: Calculate L3 indices") introduced > amd_calc_l3_indices(), but this function doesn't properly handle case > when node_to_k8_nb_misc() returns NULL, causing immediate oops due to > NULL pointer dereference in pci_read_config_dword(). > > Make amd_calc_l3_indices() return -1 in such cases. This is correct > lower bound, as it will make store_cache_disable() return EINVAL in > all such cases. > > Cc: stable@kernel.org > Signed-off-by: Jiri Kosina <jkosina@suse.cz> > --- > arch/x86/kernel/cpu/intel_cacheinfo.c | 3 +++ > 1 files changed, 3 insertions(+), 0 deletions(-) > > diff --git a/arch/x86/kernel/cpu/intel_cacheinfo.c b/arch/x86/kernel/cpu/intel_cacheinfo.c > index b3eeb66..b9f8dca 100644 > --- a/arch/x86/kernel/cpu/intel_cacheinfo.c > +++ b/arch/x86/kernel/cpu/intel_cacheinfo.c > @@ -314,6 +314,9 @@ static unsigned int __cpuinit amd_calc_l3_indices(void) > unsigned int sc0, sc1, sc2, sc3; > u32 val = 0; > > + if (!dev) > + return -1; > +
This won't fly since the function returns an unsigned value and the L3 code would still be entered, which is what you don't want actually when k8_northbridges initialization has somehow failed.
Rather, we have a fix already which should take care of your issue too, see http://git.kernel.org/tip/f2b20e41407fccfcfacf927ff91ec888832a37af
I was waiting for it to hit mainline before I backport it to stable and it would be helpful if you could verify that it works for you along with 0e152cd7c16832bd5cadee0c2e41d9959bc9b6f9 you sent earlier.
Thanks.
-- Regards/Gruss, Boris.
-- Advanced Micro Devices, Inc. Operating Systems Research Center
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