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SubjectRe: [PATCH 1/8] x86/mrst/pci: return 0 for non-present pci bars
Date
On Friday, May 14, 2010 03:41:14 pm Jacob Pan wrote:
> Moorestown PCI code has special handling of devices with fixed BARs. In
> case of BAR sizing writes, we need to update the fake PCI MMCFG space with real
> size decode value.
>
> When a BAR is not present, we need to return 0 instead of ~0. ~0 will be
> treated as device error per bugzilla 12006.

It would be more convenient if you included the URL,
https://bugzilla.kernel.org/show_bug.cgi?id=12006,
rather than just the bugzilla number.

You probably noticed already, but we reverted the patch I
proposed in 12006 because it was too aggressive, so you may
not need this patch for that reason.

Per 6.2.5.1 in the PCI 3.0 spec, "unimplemented Base Address
registers are hardwired to zero," so it would make sense to me
to follow that, but your patch affects the *write* path, not
the read path, so I don't know how it's related to what
__pci_read_base() will see when it reads the BAR.

Bjorn

> Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com>
> Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> ---
> arch/x86/pci/mrst.c | 2 +-
> 1 files changed, 1 insertions(+), 1 deletions(-)
>
> diff --git a/arch/x86/pci/mrst.c b/arch/x86/pci/mrst.c
> index 8bf2fcb..d5c7aef 100644
> --- a/arch/x86/pci/mrst.c
> +++ b/arch/x86/pci/mrst.c
> @@ -109,7 +109,7 @@ static int pci_device_update_fixed(struct pci_bus *bus, unsigned int devfn,
> decode++;
> decode = ~(decode - 1);
> } else {
> - decode = ~0;
> + decode = 0;
> }
>
> /*
>


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