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SubjectRe: Rampant ext3/4 corruption on 2.6.34-rc7 with VIVT ARM (Marvell 88f5182)
Shilimkar, Santosh wrote:
> There was a memory write barrier missing before the DMA descriptors
> are handed over to DMA controller.

On that note, are the cache flush functions implicit memory barriers?

-- Jamie


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