Messages in this thread | | | Date | Tue, 11 May 2010 15:46:59 -0500 (CDT) | From | Christoph Lameter <> | Subject | Re: [PATCH v3] ad7877: keep dma rx buffers in seperate cache lines |
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On Tue, 11 May 2010, Mike Frysinger wrote:
> > DMA. If the arch can only DMA into cacheline aligned objects then the > > correct method is to force kmalloc alignment to cacheline size. > > these are SPI drivers and are usable on any arch that supports a SPI > bus (which is pretty much every arch). forget about "embedded" > arches. > > the issue here is simple: a SPI driver (AD7877) needs to do a receive > SPI transfer into a DMA safe buffer. what is the exact API to > dynamically allocate memory for the structure with this buffer > embedded in it such that the start of the structure is cached aligned > ? creating a dedicated kmem cache may work, but it isnt a scalable > solution if every SPI driver needs to create its own cache.
kmalloc returns a pointer to a DMA safe buffer. There is no requirement on the x86 hardware that the DMA buffers have to be cache aligned. Cachelines will be invalidated as needed.
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