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SubjectRe: [PATCH 4/5] x86, cacheinfo: Make L3 cache info per node
From: "H. Peter Anvin" <>
Date: Wed, Apr 21, 2010 at 01:46:29PM -0700

> On 04/15/2010 09:41 AM, Borislav Petkov wrote:
> > +
> > +/* max 8 nodes on a system */
> > +static struct amd_l3_cache * __cpuinitdata l3_caches[8];
> > +
> This makes me very nervous. Where does this limit come from? It
> appears completely arbitrary and seems like begging for problems in the
> future.

Right. So, we currently have a 3-bit field for the node id of each node,
in conjunction with the L3 cache this means one L3 cache per node. It is
located in F0x60[2:0]. This field is setup to the proper value by the

But yeah, I see your point. I could try initializing it dynamically
per system so that there are no out of bounds accesses. Let me cook up
something tomorrow.


Advanced Micro Devices, Inc.
Operating Systems Research Center

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