Messages in this thread | | | Date | Wed, 21 Apr 2010 20:40:07 +0200 | Subject | Re: [PATCH 00/12] perf: introduce model specific events and AMD IBS | From | Stephane Eranian <> |
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On Wed, Apr 21, 2010 at 8:26 PM, Robert Richter <robert.richter@amd.com> wrote: > On 21.04.10 15:21:35, Stephane Eranian wrote: >> Okay, so you're suggesting everything is exposed via PERF_SAMPLE_REGS. >> PEBS does capture machine state which is easily mapped onto PERF_SAMPLE_REGS. >> Well, that's until you look at PEB-LL on Nehalem where is captures >> latencies and data >> addresses. >> >> Those could be funneled through PERF_SAMPLE_REGS >> as well, I believe. But that means, PERF_SAMPLE_REGS would need some >> configuration >> bitmask to name the registers of interest, e.g. EAX, EDX, IBSOP_DATA, >> IBSOP_PHYSAD, >> and so on. > > What is the idea of PERF_SAMPLE_REGS? A git grep PERF_SAMPLE_REGS only > returns a single line in -tip. I know nothing about it. > You may want to collect some of the general purpose registers (interrupted state) in each sample. This is what you get today in a signal handler (ucontext) for instance. That may also be a way to export PEBS samples.
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