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SubjectRe: [PATCH 4/5] kgdb: Use atomic operators which use barriers
On Fri, Apr 02, 2010 at 12:43:00PM -0700, Linus Torvalds wrote:
> Russell is wrong.

Actually, in future threads you end up agreeing with my position...

> The fact that maybe some ARM6 cache coherency implementation is pure and
> utter sh*t and never sees the changes without the same instruction that
> happens to be a memory barrier on that architecture does not make that
> cpu_relax() any more about memory barriers.

I'm not going to discuss it now; I'm on holiday. Wait until mid-next
week on this and I'll respond with a fuller reply.

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