Messages in this thread | | | Date | Fri, 2 Apr 2010 18:27:05 +0200 | From | Samuel Ortiz <> | Subject | Re: [PATCH] mfd: Improve WM831x AUXADC completion handling |
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On Fri, Apr 02, 2010 at 04:31:03PM +0100, Mark Brown wrote: > Currently completion of WM831x AUXADC conversions is monitored by > checking for convertor enable. Due to the mechanism used to ensure > data corruption is avoided when reading AUXADC data there may under > heavy I/O be a window where this bit has cleared but the conversion > results have not been updated. Data availability is only guaranteed > after the AUXADC data interrupt has been asserted. > > Avoid this by always using the interrupt to detect completion. If the > chip IRQ is not set up then we poll the IRQ status register for up to > 5ms. If it is set up then we rely on the data done interrupt with a > vastly increased timeout, failing the conversion if the interrupt is > not generated. > > This also saves a register read when using interrupts. > > Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Applied to my for-next branch, thanks.
Cheers, Samuel.
-- Intel Open Source Technology Centre http://oss.intel.com/
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