Messages in this thread | | | Date | Mon, 12 Apr 2010 07:37:22 -0700 | From | "H. Peter Anvin" <> | Subject | Re: [PATCH] x86: Disable 4MB page tables for Atom, work around errata AAE44 |
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On 04/12/2010 01:02 AM, Andi Kleen wrote: > Colin King <colin.king@canonical.com> writes: >> >> +static void __init check_atom(void) >> +{ >> + >> + /* >> + * Disable 4MB page tables to work around Intel errata AAE44 for >> + * Atom. We cannot guarantee stopping undefined processor behaviour >> + * when two pageing structure translations differ with respect to >> + * page frame sizes. Hence, for Atoms we disable the PSE. >> + */ >> + if (boot_cpu_data.x86_model == 0x1c) { > > Perhaps someone else pointed that out already, but you obviously > need to check for x86_vendor == X86_VENDOR_INTEL and x86_family == 6 too, > otherwise you'll get false positives. > > Besides such workarounds are normally in arch/x86/kernel/cpu/intel.c. > bugs.c is really obsolete. >
Much more than that, the constraint is clearly not strict enough. I'm currently trying to work out internally what the actual constraint should be (it's a bit of a documentation hole at the moment.)
-hpa
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