Messages in this thread | | | Subject | Re: USB mass storage and ARM cache coherency | From | Catalin Marinas <> | Date | Mon, 08 Mar 2010 10:57:04 +0000 |
| |
On Sun, 2010-03-07 at 08:23 +0000, Pavel Machek wrote: > > > Seems like ARM has requirement other architectures do not, that is > > > a) not documented anywhere > > > b) causes problems > > > > Well, ARM is pretty similar to other architectures in this respect. And > > I'm sure other architectures have similar problems, only that they only > > become visible in some circumstances they may not have encountered (i.e. > > PIO drivers + filesystem that doesn't call flush_dcache_page like ext*). > > Some other architectures may do heavier flushing > > > > Of course, a Documentation/arm/cachetlb.txt file would make sense. > > Actually, short/simple documentation for driver authors would be even > better. Then you can claim it is bug in driver :-).
That would help, but only once we agree whether it's a driver bug or the arch code needs changing.
-- Catalin
| |