Messages in this thread | | | Date | Sun, 7 Mar 2010 09:23:44 +0100 | From | Pavel Machek <> | Subject | Re: USB mass storage and ARM cache coherency |
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Hi!
> > Seems like ARM has requirement other architectures do not, that is > > a) not documented anywhere > > b) causes problems > > Well, ARM is pretty similar to other architectures in this respect. And > I'm sure other architectures have similar problems, only that they only > become visible in some circumstances they may not have encountered (i.e. > PIO drivers + filesystem that doesn't call flush_dcache_page like ext*). > Some other architectures may do heavier flushing > > Of course, a Documentation/arm/cachetlb.txt file would make sense.
Actually, short/simple documentation for driver authors would be even better. Then you can claim it is bug in driver :-). Pavel -- (english) http://www.livejournal.com/~pavelmachek (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
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