Messages in this thread | | | Subject | Re: [PATCH 3/3] perf/core, x86: implement ARCH_PERFMON_EVENTSEL bit masks | From | Peter Zijlstra <> | Date | Mon, 29 Mar 2010 18:48:58 +0200 |
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On Mon, 2010-03-29 at 18:36 +0200, Robert Richter wrote: > +++ b/arch/x86/kernel/cpu/perf_event_intel.c > @@ -454,20 +454,7 @@ static __initconst u64 atom_hw_cache_event_ids > > static u64 intel_pmu_raw_event(u64 hw_event) > { > -#define CORE_EVNTSEL_EVENT_MASK 0x000000FFULL > -#define CORE_EVNTSEL_UNIT_MASK 0x0000FF00ULL > -#define CORE_EVNTSEL_EDGE_MASK 0x00040000ULL > -#define CORE_EVNTSEL_INV_MASK 0x00800000ULL > -#define CORE_EVNTSEL_REG_MASK 0xFF000000ULL > - > -#define CORE_EVNTSEL_MASK \ > - (INTEL_ARCH_EVTSEL_MASK | \ > - INTEL_ARCH_UNIT_MASK | \ > - INTEL_ARCH_EDGE_MASK | \ > - INTEL_ARCH_INV_MASK | \ > - INTEL_ARCH_CNT_MASK) > - > - return hw_event & CORE_EVNTSEL_MASK; > + return hw_event & X86_RAW_EVENT_MASK; > }
Could you fold this with your 2/3 and create x86_pmu_raw_event() which lives in arch/x86/kernel/cpu/perf_event.c, that's more consistent wrt the X86_RAW_EVENT_MASK name and that way you don't need to re-order the #include ""s either.
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