Messages in this thread | | | Date | Tue, 16 Mar 2010 07:31:40 +0200 | From | Avi Kivity <> | Subject | Re: [PATCH] KVM MMU: check reserved bits only if CR4.PSE=1 or CR4.PAE=1 |
| |
On 03/16/2010 08:21 PM, Xiao Guangrong wrote: > The RSV bit is possibility set in error code when #PF occurred > only if CR4.PSE=1 or CR4.PAE=1 > > Signed-off-by: Xiao Guangrong<xiaoguangrong@cn.fujitsu.com> > --- > arch/x86/kvm/mmu.c | 3 +++ > 1 files changed, 3 insertions(+), 0 deletions(-) > > diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c > index 741373e..36e50ab 100644 > --- a/arch/x86/kvm/mmu.c > +++ b/arch/x86/kvm/mmu.c > @@ -2270,6 +2270,9 @@ static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level) > { > int bit7; > > + if (!is_pae(vcpu)&& !is_pse(vcpu)) > + return 0; > + > bit7 = (gpte>> 7)& 1; > return (gpte& vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0; > } >
Should be handled by reset_rsvd_bits_mask(), so that all reserved bit handling happens in one place.
I think the only change is that is !is_pse(vcpu) we ignore bit 7?
-- Do not meddle in the internals of kernels, for they are subtle and quick to panic.
| |