Messages in this thread | | | Subject | Re: [PATCH 09/10] x86-32: use SSE for atomic64_read/set if available | From | Peter Zijlstra <> | Date | Thu, 18 Feb 2010 11:24:49 +0100 |
| |
On Thu, 2010-02-18 at 10:53 +0100, Luca Barbieri wrote: > perf is currently the main user. > On Core2, lock cmpxchg8b takes about 24 cycles and writes the > cacheline, while movlps takes 1 cycle.
Then run a 64bit kernel already, then its a simple 1 cycle read.
The only platform this might possibly be worth the effort for it Atom, the rest of the world has moved on to 64bit a long time ago.
There might still be a few pentium-m users out there that might appreciate this too, but still..
That said, _iff_ this can be done nicely there's no objection.
| |