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Subject[236/289] x86: Ignore trap bits on single step exceptions
2.6.36-stable review patch.  If anyone has any objections, please let us know.


From: Frederic Weisbecker <>

commit 6c0aca288e726405b01dacb12cac556454d34b2a upstream.

When a single step exception fires, the trap bits, used to
signal hardware breakpoints, are in a random state.

These trap bits might be set if another exception will follow,
like a breakpoint in the next instruction, or a watchpoint in the
previous one. Or there can be any junk there.

So if we handle these trap bits during the single step exception,
we are going to handle an exception twice, or we are going to
handle junk.

Just ignore them in this case.

This fixes

Reported-by: Michael Stefaniuc <>
Signed-off-by: Frederic Weisbecker <>
Cc: Rafael J. Wysocki <>
Cc: Maciej Rutecki <>
Cc: Alexandre Julliard <>
Cc: Jason Wessel <>
Signed-off-by: Greg Kroah-Hartman <>

arch/x86/kernel/hw_breakpoint.c | 4 ++++
1 file changed, 4 insertions(+)

--- a/arch/x86/kernel/hw_breakpoint.c
+++ b/arch/x86/kernel/hw_breakpoint.c
@@ -433,6 +433,10 @@ static int __kprobes hw_breakpoint_handl
dr6_p = (unsigned long *)ERR_PTR(args->err);
dr6 = *dr6_p;

+ /* If it's a single step, TRAP bits are random */
+ if (dr6 & DR_STEP)
+ return NOTIFY_DONE;
/* Do an early return if no trap bits are set in DR6 */
if ((dr6 & DR_TRAP_BITS) == 0)

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