Messages in this thread | | | Date | Tue, 30 Nov 2010 13:18:32 -0800 | From | "H. Peter Anvin" <> | Subject | Re: [sodaville] [PATCH 03/11] x86/dtb: Add a device tree for CE4100 |
| |
On 11/29/2010 03:42 PM, Alan Cox wrote: >> The usual layout is that the PCI bus is a direct child of >> the root node, and the ISA bus is a child of the PCI bus. >> That reflects the "Northbridge + Southbridge" wiring that > > That isn't strictly true either. On many PC devices the ISA bus (or LPC > bus nowdays) has no heirarchy as such because ISA cycles get issued if > the PCI cycles don't generate a response. In addition some cycles go to > both busses on some chipsets and there are various bits of magic so the > I/O spaces and particularly the memory spaces are intertwined. > > So it's not a subordinate bus really, its a bit weirder. PCMCIA is > probably a sub-bus when you've got a PCI/PCMCIA adapter but ISA in > general is a bit fuzzy. >
Actually, it can go both ways -- there are ISA/LPC busses which are true childs of PCI busses -- in particular, are subject to the decoding restrictions of the host bridge -- and there are those that aren't logically even if they are physically. The reason for this is that subtractive decoding can be done either at the back end (as in a classic PCI/ISA system with a single PCI bus) or at the front end (as in HyperTransport for example.)
-hpa
| |