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Subject[PATCH] cs5535-gpio: apply CS5536 errata workaround for GPIOs

The AMD Geode CS5536 Companion Device Silicon Revision B1 Specification Update
mentions the follow as issue #36:

"Atomic write transactions to the atomic GPIO High Bank Feature Bit registers
should only affect the bits selected [...]"
"after Suspend, an atomic write transaction [...] will clear all non-selected
bits of the accessed register."

In other words, writing to the high bank for a single GPIO bit will clear
every other GPIO bit (but only sometimes after a suspend). The workaround
described is obvious and simple; do a read-modify-write. This patch does
that, and documents why we're doing it.

Signed-off-by: Andres Salomon <dilinger@queued.net>
---
drivers/gpio/cs5535-gpio.c | 16 ++++++++++++++--
1 files changed, 14 insertions(+), 2 deletions(-)

diff --git a/drivers/gpio/cs5535-gpio.c b/drivers/gpio/cs5535-gpio.c
index e23c068..599f6c9 100644
--- a/drivers/gpio/cs5535-gpio.c
+++ b/drivers/gpio/cs5535-gpio.c
@@ -56,6 +56,18 @@ static struct cs5535_gpio_chip {
* registers, see include/linux/cs5535.h.
*/

+static void errata_outl(u32 val, unsigned long addr)
+{
+ /*
+ * According to the CS5536 errata (#36), after suspend
+ * a write to the high bank GPIO register will clear all
+ * non-selected bits; the recommended workaround is a
+ * read-modify-write operation.
+ */
+ val |= inl(addr);
+ outl(val, addr);
+}
+
static void __cs5535_gpio_set(struct cs5535_gpio_chip *chip, unsigned offset,
unsigned int reg)
{
@@ -64,7 +76,7 @@ static void __cs5535_gpio_set(struct cs5535_gpio_chip *chip, unsigned offset,
outl(1 << offset, chip->base + reg);
else
/* high bank register */
- outl(1 << (offset - 16), chip->base + 0x80 + reg);
+ errata_outl(1 << (offset - 16), chip->base + 0x80 + reg);
}

void cs5535_gpio_set(unsigned offset, unsigned int reg)
@@ -86,7 +98,7 @@ static void __cs5535_gpio_clear(struct cs5535_gpio_chip *chip, unsigned offset,
outl(1 << (offset + 16), chip->base + reg);
else
/* high bank register */
- outl(1 << offset, chip->base + 0x80 + reg);
+ errata_outl(1 << offset, chip->base + 0x80 + reg);
}

void cs5535_gpio_clear(unsigned offset, unsigned int reg)
--
1.5.6.5


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