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    SubjectRe: [PATCH 1/3] jump label: add enabled/disabled state to jump label key entries
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    On Thu, 2010-11-25 at 07:52 +0100, Peter Zijlstra wrote:
    > On Thu, 2010-11-25 at 13:39 +1100, Michael Ellerman wrote:
    > > > > arch/powerpc/lib/code-patching.c:
    > > > >
    > > > > void patch_instruction(unsigned int *addr, unsigned int instr)
    > > > > {
    > > > > *addr = instr;
    > > > > asm ("dcbst 0, %0; sync; icbi 0,%0; sync; isync" : : "r"
    > > > > (addr));
    > > > > }
    > > >
    > > > Is this ever called outside of boot up? After SMP is enabled? (besides
    > > > for creating trampolines, before they are used).
    > >
    > > It is now :)
    > >
    > > AFAIK it works fine, the icbi invalidates across all processors. The
    > > only issue is that it's not precise, ie. another CPU might not see the
    > > update immediately, but as soon as it takes an interrupt or something it
    > > will.
    >
    > Ooh, nice, so the CPUs won't get all confused because you change code
    > from under their ifetch cache?

    Apparently not, at least according to the architecture.

    > How expensive is this icbi ins?

    Well apparently it's free :) But it has the effect of causing the
    subsequent isync to do the real work, so that is probably expensive.
    Benh can tell you all the gory details.

    > > What would suit us would be to have an arch callback that is called
    > > after all the transforms for a particular jump label key have been made.
    > > That way we could optimise the individual patches, and do a sync step at
    > > the end, ie. when we want the effect of the patching to be globally
    > > visible.
    >
    > I think such a sync-barrier is desired (possibly only on the enable
    > path) so we can actually say the tracepoints are on.

    It might be nice on disable too, presumably the tracepoint code is happy
    with them firing more or less any time, but other users of jump labels
    might want a firmer guarantee that they are disabled.

    > Which would mean sending IPIs to all CPUs and waiting for them to
    > acknowledge them. Which, while not quite as expensive as stop_machine,
    > its not really cheap either.

    True, and presumably the sync point is once per jump label, ie. once per
    tracepoint. For tracepoints you'd actually be happy with eg. perf
    enabling a whole bunch, and then syncing just at the end, but that's
    probably premature optimisation.

    cheers


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