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SubjectRe: [RFC PATCH 2/3 v2] perf: Implement Nehalem uncore pmu
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On Thu, 2010-11-25 at 14:09 +0800, Peter Zijlstra wrote:
> On Thu, 2010-11-25 at 08:24 +0800, Lin Ming wrote:
> > On Tue, 2010-11-23 at 18:00 +0800, Stephane Eranian wrote:
> > > On Sun, Nov 21, 2010 at 6:44 PM, Peter Zijlstra <a.p.zijlstra@chello.nl> wrote:
> > > > On Sun, 2010-11-21 at 22:04 +0800, Lin Ming wrote:
> > > >> On Sun, 2010-11-21 at 20:46 +0800, Andi Kleen wrote:
> > > >> > >
> > > >> > > 2. Uncore pmu NMI handling
> > > >> > >
> > > >> > > All the 4 cores are programmed to receive uncore counter overflow
> > > >> > > interrupt. The NMI handler(running on 1 of the 4 cores) handle all
> > > >> > > counters enabled by all 4 cores.
> > > >> >
> > > >> > Really for uncore monitoring there is no need to use an NMI handler.
> > > >> > You can't profile a core anyways, so you can just delay the reporting
> > > >> > a little bit. It may simplify the code to not use one here
> > > >> > and just use an ordinary handler.
> > > >>
> > > >> OK, I can use on ordinary interrupt handler here.
> > > >
> > > > Does the hardware actually allow using a different interrupt source?
> > > >
> > > It does not. It's using whatever you've programmed into the APIC
> > > LVT vector, AFAIK. Uncore interrupt mode is enabled via
> > > IA32_DEBUGCTL. Regarless of sampling or not, you need the interrupt
> > > to virtualize the counters to 64 bits.
> >
> > If only counting(perf stat) makes sense for uncore events, do we still
> > need an interrupt handler?
>
> Yep, I see no reason to dis-allow sampling. Sure its hard to make sense
> of it, but since there are people who offline all but one cpu of a
> package, I bet there are people who will run just one task on a package
> as well.
>
> Just because it doesn't make sense in general doesn't mean there isn't
> anybody who'd want to do it and actually knows wth he's doing.
>
> > 48 bits counter is not that easy to overflow in practice.
>
> Still..

OK, will do more tests, then send out a new version.

Thanks.




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