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    SubjectRe: [thiscpuops upgrade 09/10] x86: this_cpu_cmpxchg and this_cpu_cmpxchg_double operations
    * Christoph Lameter (cl@linux.com) wrote:
    > Provide support as far as the hardware capabilities of the x86 cpus
    > allow.
    >
    > Signed-off-by: Christoph Lameter <cl@linux.com>
    >

    [...]
    > +#define percpu_cmpxchg16b(pcp, o1, o2, n1, n2) \
    > +({ \
    > + char __ret; \
    > + typeof(o1) __o1 = o1; \
    > + typeof(o1) __n1 = n1; \
    > + typeof(o2) __o2 = o2; \
    > + typeof(o2) __n2 = n2; \
    > + asm("cmpxchg16b "__percpu_arg(1)"\n\tsetz %0\n\t" \
    > + : "=a"(__ret), "=m" (*pcp) \
    > + : "b"(__n1), "c"(__n2), "a"(__o1), "d"(__o2)); \
    > + __ret; \
    > +})

    Can we add a check to ensure that the target memory location is 16-byte aligned?
    This is a documented limitation of cmpxchg16b.

    Thanks,

    Mathieu

    > +
    > +#define __this_cpu_cmpxchg_double_8(pcp, o1, o2, n1, n2) percpu_cmpxchg16b((pcp), o1, o2, n1, n2)
    > +#define this_cpu_cmpxchg_double_8(pcp, o1, o2, n1, n2) percpu_cmpxchg16b((pcp), o1, o2, n1, n2)
    > +#define irqsafe_cmpxchg_double_8(pcp, o1, o2, n1, n2) percpu_cmpxchg16b((pcp), o1, o2, n1, n2)
    > +
    > #endif
    >
    > /* This is not atomic against other CPUs -- CPU preemption needs to be off */
    >

    --
    Mathieu Desnoyers
    Operating System Efficiency R&D Consultant
    EfficiOS Inc.
    http://www.efficios.com


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