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SubjectRe: [PATCH 4/6] ce4100: Add errata fixes for UART on CE4100
On Thu, 11 Nov 2010, Dirk Brandewie wrote:

> On 11/11/2010 03:47 AM, Thomas Gleixner wrote:
> > On Thu, 11 Nov 2010, Dirk Brandewie wrote:
> >
> > > On 11/11/2010 03:34 AM, Thomas Gleixner wrote:
> > > >
> > > >
> > > > > + * Over ride the legacy port configuration that comes from
> > > > > + * asm/serial.h. Using the ioport driver then switching to the
> > > > > + * PCI memmaped driver hangs the IOAPIC
> > > > > + */
> > > > > + if (up->iotype != UPIO_MEM32) {
> > > > > + up->uartclk = 14745600;
> > > > > + up->mapbase = 0xdffe0200;
> > > >
> > > > What does the uartclk, mapbase fixups in the CONFIG_EARLY_PRINTK=n
> > > > case ?
> > > >
> > > This is setup in the PCI driver patch #3 in the series
> >
> > I just can't find it there, that's why I'm asking :)
> The weird clock is dealt with in:
> + [pbn_ce4100_1_115200] = {
> + .flags = FL_BASE0,
> + .num_ports = 1,
> + .base_baud = 921600,
> + .reg_shift = 2,
> + },
>
> That map base is setup in the generic pci driver in setup_port(). I didn't
> need to do anything special.

Thanks for the clarification.

tglx


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