Messages in this thread | | | Date | Sun, 24 Oct 2010 03:40:15 +0100 (BST) | From | "Maciej W. Rozycki" <> | Subject | Re: [PATCH v2 8/9] MIPS: Honor L2 bypass bit |
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On Thu, 21 Oct 2010, Kevin Cernekee wrote:
> FWIW, I did check the software user's manual for each of the four > processors in the list and verified that L2B is at CONFIG2 bit 12. It > would be very rude for an L2 designer to redefine those bits in > defiance of the SUM, no?
To err is human -- people do all kinds of weird stuff, not necessarily on purpose. I think it should be safe to assume the bit is used properly until proved otherwise.
> I also rechecked 24KE just now, and found that L2B is defined in the > latest rev of the SUM, but in my local copy (Revision 01.02) bit 12 is > the MSB of SS instead. Hmmm.
Clearly a documentation bug -- notice how the width of the field disagress with the bit indices quoted.
Maciej
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