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    Subject[026/103] x86/amd-iommu: Set iommu configuration flags in enable-loop
    2.6.35-stable review patch.  If anyone has any objections, please let us know.

    ------------------

    From: Joerg Roedel <joerg.roedel@amd.com>

    commit e9bf51971157e367aabfc111a8219db010f69cd4 upstream.

    This patch moves the setting of the configuration and
    feature flags out out the acpi table parsing path and moves
    it into the iommu-enable path. This is needed to reliably
    fix resume-from-s3.

    Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
    Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>

    ---
    arch/x86/include/asm/amd_iommu_types.h | 3 ++
    arch/x86/kernel/amd_iommu_init.c | 49 ++++++++++++++++++---------------
    2 files changed, 30 insertions(+), 22 deletions(-)

    --- a/arch/x86/include/asm/amd_iommu_types.h
    +++ b/arch/x86/include/asm/amd_iommu_types.h
    @@ -368,6 +368,9 @@ struct amd_iommu {
    /* capabilities of that IOMMU read from ACPI */
    u32 cap;

    + /* flags read from acpi table */
    + u8 acpi_flags;
    +
    /*
    * Capability pointer. There could be more than one IOMMU per PCI
    * device function if there are more than one AMD IOMMU capability
    --- a/arch/x86/kernel/amd_iommu_init.c
    +++ b/arch/x86/kernel/amd_iommu_init.c
    @@ -649,29 +649,9 @@ static void __init init_iommu_from_acpi(
    struct ivhd_entry *e;

    /*
    - * First set the recommended feature enable bits from ACPI
    - * into the IOMMU control registers
    + * First save the recommended feature enable bits from ACPI
    */
    - h->flags & IVHD_FLAG_HT_TUN_EN_MASK ?
    - iommu_feature_enable(iommu, CONTROL_HT_TUN_EN) :
    - iommu_feature_disable(iommu, CONTROL_HT_TUN_EN);
    -
    - h->flags & IVHD_FLAG_PASSPW_EN_MASK ?
    - iommu_feature_enable(iommu, CONTROL_PASSPW_EN) :
    - iommu_feature_disable(iommu, CONTROL_PASSPW_EN);
    -
    - h->flags & IVHD_FLAG_RESPASSPW_EN_MASK ?
    - iommu_feature_enable(iommu, CONTROL_RESPASSPW_EN) :
    - iommu_feature_disable(iommu, CONTROL_RESPASSPW_EN);
    -
    - h->flags & IVHD_FLAG_ISOC_EN_MASK ?
    - iommu_feature_enable(iommu, CONTROL_ISOC_EN) :
    - iommu_feature_disable(iommu, CONTROL_ISOC_EN);
    -
    - /*
    - * make IOMMU memory accesses cache coherent
    - */
    - iommu_feature_enable(iommu, CONTROL_COHERENT_EN);
    + iommu->acpi_flags = h->flags;

    /*
    * Done. Now parse the device entries
    @@ -1116,6 +1096,30 @@ static void init_device_table(void)
    }
    }

    +static void iommu_init_flags(struct amd_iommu *iommu)
    +{
    + iommu->acpi_flags & IVHD_FLAG_HT_TUN_EN_MASK ?
    + iommu_feature_enable(iommu, CONTROL_HT_TUN_EN) :
    + iommu_feature_disable(iommu, CONTROL_HT_TUN_EN);
    +
    + iommu->acpi_flags & IVHD_FLAG_PASSPW_EN_MASK ?
    + iommu_feature_enable(iommu, CONTROL_PASSPW_EN) :
    + iommu_feature_disable(iommu, CONTROL_PASSPW_EN);
    +
    + iommu->acpi_flags & IVHD_FLAG_RESPASSPW_EN_MASK ?
    + iommu_feature_enable(iommu, CONTROL_RESPASSPW_EN) :
    + iommu_feature_disable(iommu, CONTROL_RESPASSPW_EN);
    +
    + iommu->acpi_flags & IVHD_FLAG_ISOC_EN_MASK ?
    + iommu_feature_enable(iommu, CONTROL_ISOC_EN) :
    + iommu_feature_disable(iommu, CONTROL_ISOC_EN);
    +
    + /*
    + * make IOMMU memory accesses cache coherent
    + */
    + iommu_feature_enable(iommu, CONTROL_COHERENT_EN);
    +}
    +
    /*
    * This function finally enables all IOMMUs found in the system after
    * they have been initialized
    @@ -1126,6 +1130,7 @@ static void enable_iommus(void)

    for_each_iommu(iommu) {
    iommu_disable(iommu);
    + iommu_init_flags(iommu);
    iommu_set_device_table(iommu);
    iommu_enable_command_buffer(iommu);
    iommu_enable_event_buffer(iommu);



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