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SubjectRe: Disable L1/L2/L3 cache and MTRR
Hi,

On Thu, Oct 21, 2010 at 12:21:15PM -0400, Andev wrote:
>
> In Intel software developers manual, it is mentioned that apart from the
> above you need to disable MTRR. I did that using the following command:
>
> echo "disable=00" >| /proc/mtrr
>
> Now when I run some sample benchmarks they show a slowdown of almost 1000x!!
>
> This is not reasonable since the max. The slowdown I was expecting is 200x
> considering that it will take 200 cycles to read from DRAM.

Assuming the cache was completely disabled, won't the impact be
cumulative? E.g. imagine a memory read takes one cycle from cache and
100 from main memory. If you read 5 instructions from cache that will
take 5 cycles. If you read 5 instructions from main memory that will be
5*100 so 500 cycles. If it is 10 instructions then it is 10 vs 1000 and
so on...

Are you searching for an improvement in determinism?

--
Sitsofe | http://sucs.org/~sits/


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