Messages in this thread | | | Subject | Re: Subject: [PATCH 1/2] x86: get back 15 vectors | From | (Eric W. Biederman) | Date | Mon, 04 Jan 2010 12:14:50 -0800 |
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Yinghai Lu <yinghai@kernel.org> writes:
> On 01/04/2010 11:48 AM, H. Peter Anvin wrote: >> [Adding Suresh to the Cc: list] >> >> On 01/04/2010 11:35 AM, Yinghai Lu wrote: >>> >>> so we can use [0x10, 0x1f] >>> >>> sth like this? >>> >> >> No!!! >> >> [0x10, 0x1f] is reserved for exceptions. We can probably get away with >> stealing *one* vector... presumably at the end (0x1f). However, we can >> absolutely not use the whole block: 0x10-0x13 is occupied by exceptions >> we already have OS support for (#MF, #AC, #MC, and #XM), and it's pretty >> much guaranteed we'll have more coming. However, growth is quite slow >> and since this is a kernel-internal vector (not accessible to user >> space) it is not creating an API. >> >> In other words, we could change FIRST_EXTERNAL_VECTOR to 0x1f, and use >> it for IRQ_MOVE_CLEANUP_VECTOR. Then use 0x20..0x2f for the legacy vectors. >> > Subject: [PATCH 1/2] x86: get back 16 vectors > > -v2: according to hpa that we could start from 0x1f
The code in the patch is ok, but the comments are wrong.
> > Signed-off-by: Yinghai Lu <yinghai@kernel.org> > > --- > arch/x86/include/asm/irq_vectors.h | 9 +++++---- > 1 file changed, 5 insertions(+), 4 deletions(-) > > Index: linux-2.6/arch/x86/include/asm/irq_vectors.h > =================================================================== > --- linux-2.6.orig/arch/x86/include/asm/irq_vectors.h > +++ linux-2.6/arch/x86/include/asm/irq_vectors.h > @@ -30,8 +30,9 @@ > /* > * IDT vectors usable for external interrupt sources start > * at 0x20: > + * hpa said we can start from 0x1f
You need to document the reasons here.
> */ > -#define FIRST_EXTERNAL_VECTOR 0x20 > +#define FIRST_EXTERNAL_VECTOR 0x1f > > #ifdef CONFIG_X86_32 > # define SYSCALL_VECTOR 0x80 > @@ -41,15 +42,15 @@ > #endif > > /* > - * Reserve the lowest usable priority level 0x20 - 0x2f for triggering > + * Reserve the lowest usable priority level 0x1f for triggering
Should be: + * Reserve the lowest usable priority level 0x10 - 0x1f for triggering > * cleanup after irq migration.
+ * this overlaps with the reserved range for cpu exceptions so this + * will need to be changed to 0x20 - 0x2f if the last cpu exception is + * ever allocated. > */ > #define IRQ_MOVE_CLEANUP_VECTOR FIRST_EXTERNAL_VECTOR > > /* > - * Vectors 0x30-0x3f are used for ISA interrupts. > + * Vectors 0x20-0x2f are used for ISA interrupts. > */ > -#define IRQ0_VECTOR (FIRST_EXTERNAL_VECTOR + 0x10) > +#define IRQ0_VECTOR (FIRST_EXTERNAL_VECTOR + 1) > > #define IRQ1_VECTOR (IRQ0_VECTOR + 1) > #define IRQ2_VECTOR (IRQ0_VECTOR + 2)
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