[lkml]   [2010]   [Jan]   [21]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
Messages in this thread
    SubjectRe: [PATCH 1/3] x86, cacheinfo: Fix disabling of L3 cache indexes
    On 01/21/2010 08:30 AM, Borislav Petkov wrote:
    > The preexisting code using wbinvd is a bug since wbinvd has to happen on
    > a core which contains the L3 cache whose indices(!) we disable.

    OK, please make a note in the code as to why it is (if it is) correct
    not to use the PV version here... I'm not sure the above explains why it
    should invoke native_wbinvd() and not wbinvd() -- the fact that is has
    to be done on the right CPU is another matter, of course.

    > But yeah, a wbinvd smp version is a bit problematic since
    > smp_call_function_* expects a function pointer which has a void *
    > argument but native_wbinvd() has no args. By the way, there's a similar
    > thing in <drivers/char/agp/intel-agp.c::do_wbinvd()>

    Saw that, thank you for handling that.

    >> Second, it's pretty obvious that the only reason for this function at
    >> all is to provide a wrapper that can be passed to smp_call_function*().
    >> It would be a lot cleaner to have a small function wbinvd_on_cpu(cpu)
    >> as a wrapper for the higher-order functionality.
    > Done, see my next patch series.

    I wrote some comments on that before I saw this reply. I think it has
    some code cleanliness issues (noted in comments), but otherwise it's a
    lot better.


     \ /
      Last update: 2010-01-21 19:25    [W:0.037 / U:159.668 seconds]
    ©2003-2016 Jasper Spaans. hosted at Digital OceanAdvertise on this site