Messages in this thread | | | From | Krzysztof Halasa <> | Subject | Re: SATA_SIL on IXP425 workaround | Date | Thu, 14 Jan 2010 21:12:47 +0100 |
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Alan Cox <alan@lxorguk.ukuu.org.uk> writes:
> I think this is the wrong place. If your platform can't do MMIO properly > then the platform pci_iomap or pci quirk code should do the needed > cleaning up, not put turds into the drivers. Why not just quirk it on your > specific platform and clear the MMIO mapping.
We need to use the MMIO BAR at least for starting DMA transfers, the I/O ones are 64KB-limited. We can't just use read[bw] if reading all 32 bits has side effects.
Most of the time there are no problems with MMIO on IXP4xx as modern devices usually use 32-bit registers anyway, or at least they have no problem with read[bw] always driving all four PCI byte enable lines (write[bw] doesn't have this issue). -- Krzysztof Halasa
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