Messages in this thread | | | Date | Wed, 13 Jan 2010 12:38:59 -0800 | From | "H. Peter Anvin" <> | Subject | Re: [patch] x86, apic: use 0x20 for the IRQ_MOVE_CLEANUP_VECTOR instead of 0x1f |
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On 01/13/2010 12:36 PM, Eric W. Biederman wrote: > "H. Peter Anvin" <hpa@zytor.com> writes: > >> On 01/11/2010 05:52 PM, Eric W. Biederman wrote: >>> >>> After having the documentation quoted at me. I am having a distinct >>> memory of one piece of documentation saying: >>> "interrupts within a priority level can be delivered in any order" >>> >>> So I am guessing there is not any ordering of interrupts in the same >>> priority level until they get to the local apic. >>> >> >> There is no ordering of interrupts before they hit the local APIC, since >> the local APIC is what would serialize them... > > The io apic serializes them, and sends them over either the 2-wire > bus or the front side bus. How much serialization and prioritization > happens at that point I am not certain, but some certainly happens > before you get to the local apic. >
If you *have* a front side bus, that is! With QPI or HyperTransport, you don't have a single serializing bus in the same way, but you have a mesh network instead.
-hpa
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