Messages in this thread | | | From | Krzysztof Halasa <> | Subject | Re: Disabling DMA with ICH10? | Date | Wed, 30 Sep 2009 14:21:53 +0200 |
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Alan Cox <alan@lxorguk.ukuu.org.uk> writes:
> INB foo > > CPU -> PCI device read this register > PCI device -> Disk > trundle whirr whirrr > clunk clunk thud > Disk -> PCI device > PCI device -> CPU... "5" > > INB completes > > The INB is not interruptible mid instruction and stalls the CPU for the > full period of the message passing back and forth across the bus. So PIO > 0 on PCI stalls the bus for the equivalent of an ISA access, and PIO4 > while a good deal faster is still a very long stall in hard real time > terms.
Sure :-)
That's why I wrote it's a bad idea. I just wanted to correct the statement about ISA speed - it's not (necessarily) ISA speed, though it's slow and uses 100% CPU (core) time. (And PIO on PCI* in general is not much faster, though usually faster than ISA). -- Krzysztof Halasa
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