Messages in this thread | | | Date | Mon, 21 Sep 2009 14:19:57 +0300 | Subject | Re: [PATCH v3 1/2] ARM: Introduce ARM_L1_CACHE_SHIFT to define cache line size | From | "Kirill A. Shutemov" <> |
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On Mon, Sep 21, 2009 at 11:37 AM, Russell King - ARM Linux <linux@arm.linux.org.uk> wrote: > On Sat, Sep 12, 2009 at 11:48:30PM +0300, Kirill A. Shutemov wrote: >> Currently kernel believes that all ARM CPUs have L1_CACHE_SHIFT == 5. >> It's not true at least for CPUs based on Cortex-A8. > > Please send this to the patch system. There's no need to add the "V2" > comments to it when you do. >
#5716, #5717
BTW, I ,my pathes without change log in your git tree. Commits 910a17e and dca230f. What is wrong with it? -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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