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    Subject[patch 30/45] x86, pat: Fix cacheflush address in change_page_attr_set_clr()
    2.6.31-stable review patch.  If anyone has any objections, please let us know.

    ------------------
    From: Jack Steiner <steiner@sgi.com>

    commit fa526d0d641b5365676a1fb821ce359e217c9b85 upstream.

    Fix address passed to cpa_flush_range() when changing page
    attributes from WB to UC. The address (*addr) is
    modified by __change_page_attr_set_clr(). The result is that
    the pages being flushed start at the _end_ of the changed range
    instead of the beginning.

    This should be considered for 2.6.30-stable and 2.6.31-stable.

    Signed-off-by: Jack Steiner <steiner@sgi.com>
    Acked-by: Suresh Siddha <suresh.b.siddha@intel.com>
    Signed-off-by: H. Peter Anvin <hpa@zytor.com>
    Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>

    ---
    arch/x86/mm/pageattr.c | 8 +++++++-
    1 file changed, 7 insertions(+), 1 deletion(-)

    --- a/arch/x86/mm/pageattr.c
    +++ b/arch/x86/mm/pageattr.c
    @@ -822,6 +822,7 @@ static int change_page_attr_set_clr(unsi
    {
    struct cpa_data cpa;
    int ret, cache, checkalias;
    + unsigned long baddr = 0;

    /*
    * Check, if we are requested to change a not supported
    @@ -853,6 +854,11 @@ static int change_page_attr_set_clr(unsi
    */
    WARN_ON_ONCE(1);
    }
    + /*
    + * Save address for cache flush. *addr is modified in the call
    + * to __change_page_attr_set_clr() below.
    + */
    + baddr = *addr;
    }

    /* Must avoid aliasing mappings in the highmem code */
    @@ -900,7 +906,7 @@ static int change_page_attr_set_clr(unsi
    cpa_flush_array(addr, numpages, cache,
    cpa.flags, pages);
    } else
    - cpa_flush_range(*addr, numpages, cache);
    + cpa_flush_range(baddr, numpages, cache);
    } else
    cpa_flush_all(cache);




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